{"id":21402,"date":"2022-12-28T10:57:04","date_gmt":"2022-12-28T02:57:04","guid":{"rendered":"https:\/\/www.ab-sm.com\/?p=21402"},"modified":"2022-12-28T10:57:54","modified_gmt":"2022-12-28T02:57:54","slug":"%e5%85%88%e8%bf%9b%e5%b0%81%e8%a3%85chiplet-%e6%8a%80%e6%9c%af%e4%bb%8b%e7%bb%8d%ef%bc%88%e8%a7%86%e9%a2%91%ef%bc%89","status":"publish","type":"post","link":"https:\/\/www.ab-sm.com\/a\/21402","title":{"rendered":"\u5148\u8fdb\u5c01\u88c5Chiplet \u6280\u672f\u4ecb\u7ecd\uff08\u89c6\u9891\uff09"},"content":{"rendered":"

\u5148\u8fdb\u5c01\u88c5Chiplet \u6280\u672f\u4ecb\u7ecd\uff08\u89c6\u9891\uff09
\n<\/strong><\/span><\/p>\n

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Hello everyone, welcome to semi content. I got a request to talk about chimney, so today's topic is chimney. Let's talk about it. Chimney is a semiconductor technology to use multiple small dyes to achieve target function, which is supposed to be done by one dice dye. Its goal is to reduce product development time and cost by integrating multiple smaller dyes in a package. A chimney is not a package type and it is part of a packaging architecture. With chimney, dice could be integrated into an existing package type, such as 2.5 d, 3 d, fan out, multi chain modules.<\/p>\n

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\u5927\u5bb6\u597d\uff0c\u6b22\u8fce\u6765\u5230\u534a\u5bfc\u4f53\u5185\u5bb9\u3002\u6211\u63a5\u5230\u4e00\u4e2a\u8bb2\u8bb2\u5173\u4e8eChiplet\u7684\u8bf7\u6c42\uff0c\u6240\u4ee5\u4eca\u5929\u7684\u8bdd\u9898\u662fChiplet\u3002\u6211\u4eec\u6765\u8c08\u8c08\u5427\u3002Chiplet\u662f\u4e00\u79cd\u534a\u5bfc\u4f53\u6280\u672f\uff0c\u4f7f\u7528\u591a\u79cd\u5c0f\u82af\u7c92\u6765\u5b9e\u73b0\u76ee\u6807\u529f\u80fd\uff0c\u5c06\u539f\u672c\u5e94\u8be5\u7531\u4e00\u4e2a\u82af\u7c92\u6765\u5b8c\u6210\u7684\u4efb\u52a1\uff0c\u5206\u4e3a\u591a\u79cd\u8f83\u5c0f\u7684\u82af\u7c92\u96c6\u6210\u5728\u4e00\u8d77\u6765\u5b9e\u73b0\u3002\u4ece\u800c\uff0c\u51cf\u5c11\u4ea7\u54c1\u5f00\u53d1\u65f6\u95f4\u548c\u6210\u672c\u3002Chiplet\u4e0d\u662f\u6307\u5c01\u88c5\u7c7b\u578b\uff0c\u5b83\u662f\u5c01\u88c5\u67b6\u6784\u7684\u4e00\u90e8\u5206\u3002\u901a\u8fc7chiplet\uff0c\u591a\u79cd\u82af\u7c92\u53ef\u4ee5\u96c6\u6210\u5230\u73b0\u6709\u7684\u5c01\u88c5\u7c7b\u578b\u4e2d\uff0c\u4f8b\u59822.5D\u30013D\u3001\u6247\u51fa\u53ca\u591a\u82af\u7247\u6a21\u5757\u3002<\/p>\n

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\u5fae\u4fe1\u8bc6\u522b\u4e8c\u7ef4\u7801\u89c2\u770b\u89c6\u9891
\n<\/strong><\/span><\/p>\n

Imagine we have one large die and it has CPU, GPU and other functional blocks all in one die as soc system chip. But it is very expensive and there are many challenges to make these clients die. Fortunately, we can have all these functions by multiple smaller dyes. And economically it is more reasonable. But we need to add interface block to each die, so total die area will be more than one dodge die. That is a brief concept of chimney. So chimney is a good solution for large expensive dye, which is typically for high performance computing, rather than for a small die in smartphone. A silicone note of semiconductor advanced like 45nm,16nm and even 7nm.<\/p>\n

\u60f3\u8c61\u4e00\u4e0b\uff0c\u6211\u4eec\u6709\u4e00\u4e2a\u5927\u82af\u7247\uff0c\u5b83\u6709CPU\uff0cGPU\uff0cRAM\u53ca\u5176\u5b83\u529f\u80fd\u5757\u90fd\u5728\u4e00\u4e2a\u82af\u7247\u4e2d\u4f5c\u4e3aSOC\u7cfb\u7edf\u82af\u7247\u3002\u4f46\u8fd9\u662f\u975e\u5e38\u6602\u8d35\u7684\uff0c\u5e76\u4e14\u6709\u8bb8\u591a\u6311\u6218\u4f7f\u8fd9\u4e9b\u4ea7\u54c1\u5f88\u96be\u91cf\u4ea7\u3002\u5e78\u8fd0\u7684\u662f\uff0c\u6211\u4eec\u53ef\u4ee5\u901a\u8fc7\u591a\u79cd\u8f83\u5c0f\u7684\u82af\u7c92\u6765\u5b9e\u73b0\u6240\u6709\u8fd9\u4e9b\u529f\u80fd\uff0c\u800c\u4e14\u8fd9\u6837\u5728\u6210\u672c\u4e0a\u66f4\u5408\u7406\u3002\u4f46\u662f\u7531\u4e8e\u6211\u4eec\u9700\u8981\u5728\u6bcf\u4e2a\u82af\u7c92\u4e0a\u6dfb\u52a0\u63a5\u53e3\u6a21\u5757\uff0c\u6240\u4ee5\u603b\u7684\u6240\u6709\u82af\u7c92\u603b\u9762\u79ef\u5c06\u8d85\u8fc7\u5168\u90e8\u96c6\u6210\u5728\u4e00\u4e2a\u82af\u7247\u4e0a\u3002\u8fd9\u662fchiplet\u7684\u4e00\u4e2a\u7b80\u5355\u6982\u5ff5\u3002\u56e0\u6b64\uff0cChiplet\u662f\u5927\u578b\u7cfb\u7edf\u96c6\u6210\u82af\u7247\u7684\u826f\u597d\u89e3\u51b3\u65b9\u6848\uff0c\u901a\u5e38\u7528\u4e8e\u9ad8\u6027\u80fd\u8ba1\u7b97\uff0c\u800c\u4e0d\u662f\u667a\u80fd\u624b\u673a\u4e2d\u7684\u5c0f\u82af\u7247\u3002\u4e00\u79cd\u4f7f\u7528\u5148\u8fdb\u7684\u534a\u5bfc\u4f53\u5236\u7a0b\u598245nm\u300116nm\u751a\u81f37nm\u3002<\/p>\n

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Cost for large dice continues to increase. Cost for a 16mm dye with 250mm\u00b2 size is more than 2 times expensive than 45nm die with same die size. And 7nm die is more than 4 times expensive than 45nm die. Now we're talking about 5nm and even 3nm. Then cost revenue increased continuously. That means fabricating large soc dies with advanced silicone node is losing its economical benefit. That is why the industry has started to use chimney again.<\/p>\n

\u968f\u7740\u5927\u82af\u7c92\u7684\u6210\u672c\u7ee7\u7eed\u589e\u52a0\u3002\u9488\u5bf9\u4e00\u4e2a250mm\u00b2\u5c3a\u5bf8\u7684\u82af\u7c92\uff0c14\u621616\u7eb3\u7c73\u5236\u7a0b\u7684\u6210\u672c\u662f\u76f8\u540c\u5c3a\u5bf8\u768445\u7eb3\u7c73\u82af\u7247\u76842\u500d\u4ee5\u4e0a\u3002\u800c7\u7eb3\u7c73\u82af\u7247\u6bd445\u7eb3\u7c73\u82af\u7247\u8d354\u500d\u4ee5\u4e0a\u3002\u800c\u5230\u6211\u4eec\u6700\u8fd1\u8c08\u8bba\u76845\u7eb3\u7c73\u751a\u81f33\u7eb3\u7c73\uff0c\u6210\u672c\u66f4\u5c06\u4e0d\u65ad\u589e\u52a0\u3002\u8fd9\u610f\u5473\u7740\u4f7f\u7528\u5148\u8fdb\u5236\u7a0b\u5236\u9020\u5927\u578bSoC\u82af\u7247\u6b63\u5728\u5931\u53bb\u5176\u7ecf\u6d4e\u6548\u76ca\u3002\u8fd9\u5c31\u662f\u4e3a\u4ec0\u4e48\u8fd9\u4e2a\u884c\u4e1a\u53c8\u5f00\u59cb\u4f7f\u7528chiplet\u4e86\u3002<\/p>\n

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Chimney is to break down a large expensive single die into multiple smaller dyes. How it works? This is simple comparison between one dies die and 4 small dies. If there is a defect at the upper left of the die, then it is risen. One die liseth out of one die. So eld is 0. If we have 4 small dies and there is same defect at the exact same location. Then only one die is risen out of 4 dice and eld is 75%. That means we still can save 30 dice. It is more obvious for belly lies die. It also works for a dialogue at the vapor edge. At the left we have dialogues at the wafer ads for large diet. At the right we also have a dye loss, but smaller dye has higher yield than last dye. This is dialed comparison between one die versus chimney with 2,3 and 4 dies. For a 360mm\u00b2 one die we'll have 15% ill but a full chimney design each 99 k millimeters will have 37 yield more than doubles. Even though the total die area of 4 chimney design is more than 10 than one die, the significant yield improvement of chimney is good enough to justify a chimney solution.<\/p>\n

Chiplet\u662f\u5c06\u5927\u578b\u7684\u5355\u4e00\u82af\u7c92\u5206\u89e3\u6210\u591a\u4e2a\u8f83\u5c0f\u7684\u82af\u7c92\u3002\u5b83\u662f\u5982\u4f55\u5de5\u4f5c\u7684\uff1f\u8fd9\u662f\u4e00\u4e2a\u5927\u82af\u7c92\u548c4\u4e2a\u5c0f\u82af\u7c92\u4e4b\u95f4\u7684\u7b80\u5355\u6bd4\u8f83\u3002\u5982\u679c\u5728\u82af\u7c92\u7684\u5de6\u4e0a\u89d2\u6709\u7f3a\u9677\uff0c\u5219\u6574\u4e2a\u82af\u7c92\u5c31\u65e0\u6cd5\u4f7f\u7528\uff0c\u6240\u4ee5\u826f\u7387\u662f0\u3002\u5982\u679c\u6211\u4eec\u67094\u4e2a\u5c0f\u82af\u7c92\uff0c\u5e76\u4e14\u5728\u5b8c\u5168\u76f8\u540c\u7684\u4f4d\u7f6e\u5b58\u5728\u76f8\u540c\u7684\u7f3a\u9677\u3002\u7136\u540e4\u4e2a\u82af\u7c92\u53ea\u6709\u4e00\u4e2a\u4e0d\u80fd\u4f7f\u7528\uff0c\u826f\u7387\u4e3a75%\u3002\u8fd9\u610f\u5473\u7740\u6211\u4eec\u4ecd\u7136\u53ef\u4ee5\u8282\u77013\u4e2a\u82af\u7c92\u3002\u5b83\u4e5f\u9002\u7528\u4e8e\u8fb9\u7f18DIE\u3002\u5728\u5de6\u8fb9\uff0c\u6211\u4eec\u6709\u5927\u91cf\u65e0\u6cd5\u4f7f\u7528\u7684\u8fb9\u7f18DIE\u3002\u5728\u53f3\u8fb9\uff0c\u6211\u4eec\u4e5f\u6709\u76f8\u7c7b\u4f3c\u7684\u635f\u5931\uff0c\u4f46\u8f83\u5c0f\u7684\u82af\u7c92\u6bd4\u8f83\u5927\u7684\u82af\u7c92\u5177\u6709\u66f4\u9ad8\u7684\u826f\u7387\u3002\u8fd9\u662f\u4e00\u4e2a\u82af\u7c92\u4e0echiplet \u7684\u67092,3\u62164\u4e2a\u82af\u7c92\u4e4b\u95f4\u7684\u6bd4\u8f83\u3002\u5bf9\u4e8e360mm\u00b2\u7684\u4e00\u4e2a\u82af\u7c92\uff0c\u6211\u4eec\u4ec5\u670915%\u7684\u826f\u7387\u3002\u4f46\u9488\u5bf94\u4e2a\u82af\u7c92\u7684chiplet \u8bbe\u8ba1\uff0c\u826f\u7387\u5c06\u662f\u524d\u8005\u7684\u4e00\u500d\u4ee5\u4e0a\u3002\u5373\u4f7f4\u4e2a\u82af\u7c92\u7684chiplet \u8bbe\u8ba1\u7684\u603b\u9762\u79ef\u6bd4\u4e00\u4e2a\u5927\u82af\u7c92\u591a\u51fa10%\uff0cChiplet\u7684\u8bbe\u8ba1\u660e\u663e\u63d0\u9ad8\u4e86\u826f\u7387\u548c\u5408\u7406\u6027\u3002<\/p>\n

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Back in 2014 fpga company gidings made vertex 72000 t and it used 4 smaller chimney dyes rather than one. Dodge fpga. This is AMD epic second generation package and it is a CPU for server using 7nm silicone note technology. Its package size is 58.5mm by 75 point 4mm. Yes, it is big. There are 8 CPUs using 7nm silicon technology and one iodi using 14nm silicon technology at the center. This is Intel xe hpc and it is a GPU using 7nm silicon technology for a supercomputer. Now Intel is using this only in the lab. It has 47 components and include 2 base tiles using Intel's 10nm sofa pin technology. 16 computer tiles using t s m c. Seven nanometer technology.<\/p>\n

\u65e9\u57282014\u5e74\uff0c\u8d5b\u7075\u601d\u751f\u4ea7\u768472000\uff0c\u5b83\u4f7f\u7528\u4e864\u4e2a\u8f83\u5c0f\u7684\u82af\u7c92\uff0c\u800c\u4e0d\u662f1\u4e2a\u5927\u82af\u7247\u3002\u8fd9\u662fAMD\u53f2\u8bd7\u7ea7\u822c\u7684\u7b2c\u4e8c\u4ee3\u5c01\u88c5\uff0c\u5b83\u662f\u4f7f\u75287nm\u7684\u670d\u52a1\u5668CPU\u3002\u5176\u5c01\u88c5\u5c3a\u5bf8\u4e3a58.5mm\u4e5875.4mm,\u5b83\u975e\u5e38\u5927\u3002\u4e2d\u5fc3\u67098\u4e2a\u4f7f\u75287nm\u6280\u672f\u7684CPU\u548c\u4e00\u4e2aI\/O \u82af\u7247\u4f7f\u752814nm\u6280\u672f\u3002\u8fd9\u662f\u82f1\u7279\u5c14XE HPC\uff0c\u5b83\u91cc\u9762\u7684GPU\u4f7f\u75287nm\u6280\u672f\uff0c\u73b0\u5728\u82f1\u7279\u5c14\u53ea\u5728\u5b9e\u9a8c\u5ba4\u4e2d\u4f7f\u7528\u5b83\u3002\u5b83\u670947\u4e2a\u7ec4\u4ef6\uff0c\u5305\u62ec2\u4e2a\u57fa\u7840\u82af\u7247\u4f7f\u7528\u82f1\u7279\u5c1410nm\u6280\u672f\u300216\u4e2a\u8ba1\u7b97\u6838\u5fc3\u4f7f\u7528TSMC\u76847\u7eb3\u7c73\u6280\u672f\u3002<\/p>\n

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A lambo cache tile using intel's ten nanometer enhanced super pin process. 11 MIB links made by Intel. 2 x link Io tile made by a foundry. 8 HBM memory stacks produced by a dealer manufacturer. It ought to be impossible to build a single chip with these 47 components. Even though chimney has lots of benefit, it also has some challenges. We need to think about die to die interconnection, code design by chip designer and package designer. Easily required tests for small dies will be different from one large dies, etc. Thanks for watching and have a nice day. Bye bye.<\/p>\n

11\u4e2a\u7f13\u51b2\u4f7f\u7528\u82f1\u7279\u5c14\u5341\u7eb3\u7c73\u6280\u672f\uff0c2 \u4e2aI\/O\u82af\u7c92\u7531\u4ee3\u5de5\u5382\u4ee3\u5de5\u30028\u4e2aHBM\u5b58\u50a8\u5668\u5806\u6808\u7531\u5b58\u50a8\u5382\u52a0\u5de5\u3002\u6ca1\u6709chiplet\u6280\u672f\uff0c\u662f\u4e0d\u53ef\u80fd\u5c0647\u4e2a\u82af\u7c92\u7684\u529f\u80fd\u4e00\u6b21\u6027\u5728\u5355\u4e2a\u82af\u7247\u4e0a\u52a0\u5de5\u5b8c\u6210\u7684\u3002\u5c3d\u7ba1chiplet\u6709\u5f88\u591a\u597d\u5904\uff0c\u4f46\u5b83\u4e5f\u6709\u4e00\u4e9b\u6311\u6218\u3002\u6211\u4eec\u9700\u8981\u601d\u8003\u82af\u7247\u5230\u82af\u7247\u7684\u4e92\u8fde\uff0c\u82af\u7247\u8bbe\u8ba1\u5e08\u548c\u5c01\u88c5\u8bbe\u8ba1\u5e08\u7684\u534f\u540c\uff0c\u591a\u4e2a\u5c0f\u82af\u7c92\u7684\u6d4b\u8bd5\u4e5f\u5c06\u975e\u5e38\u4e0d\u540c\u4e8e\u4e00\u4e2a\u5927\u82af\u7c92\u7684\u6d4b\u8bd5\u7b49\u3002<\/p>\n

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\u5fae\u4fe1\u8bc6\u522b\u4e8c\u7ef4\u7801\u89c2\u770b\u89c6\u9891
\n<\/strong><\/span><\/p>\n


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